The present invention relates to an interposer and a method for fabricating the interposer, more specifically an interposer including a capacitor dielectric film of very high relative dielectric constant formed in, and a method for fabricating the interposer.
Recently, for digital LSI's (Large Scale Integrated circuits), etc., typically microprocessors, etc., the operation speed is increased, and the electric power consumption is decreased.
To stably operate the LSI's in the GHz-band high-frequency range and furthermore at low voltage, it is very important to suppress the source voltage fluctuations due to abrupt changes of load impedance, etc. of the LSI's and to remove high-frequency noises of the power source.
Conventionally, the source voltage fluctuations is suppressed, and the high-frequency noises are removed by mounting decoupling capacitors near an LSI, etc. mounted on a circuit wiring board. The decoupling capacitors are formed on a board different from the circuit wiring board and are mounted suitably on the circuit wiring board.
However, in mounting the decoupling capacitors near the LSI mounted on a circuit wiring board, the LSI and the decoupling capacitors are electrically connected to each other via lines formed on the circuit wiring board, and accordingly large inductance due to the wiring of the lines is present. The inductance between the LSI and the decoupling capacitors makes it possible to sufficiently suppress the source voltage and sufficiently remove high-frequency noises. In order to sufficiently suppress the source voltage fluctuations and sufficiently remove the high-frequency noises, the equivalent serial resistance (ESR) and the equivalent serial inductance (ESL) are required to be decreased.
To this end, the technique of providing interposers including capacitors incorporated in between the LSI and the circuit wiring board is noted (Patent References 1 to 6).
Following references disclose the background art of the present invention.
[Patent Reference 1]
Specification of Japanese Patent Application Unexamined Publication No. Hei 4-211191
[Patent Reference 2]
Specification of Japanese Patent Application Unexamined Publication No. Hei 7-176453
[Patent Reference 3]
Specification of Japanese Patent Application Unexamined Publication No. 2001-68583
[Patent Reference 4]
Specification of Japanese Patent Application Unexamined Publication No. 2001-35990
[Patent Reference 5]
Specification of Japanese Patent Application Unexamined Publication No. 2004-304159
[Patent Reference 6]
Specification of Japanese Patent Application Unexamined Publication No. 2002-83892
[Patent Reference 7]
Specification of Japanese Patent No. 3583396
In the techniques described in Patent References 1 to 5, however, through-holes must be formed in the substrate, for burying through-electrodes in the substrate. It is not easy to form the through-holes in the substrate. Accordingly, it is very difficult to decrease the cost by the techniques described in Patent References 1 to 5.
In the technique described in Patent Reference 6, the capacitors are formed by forming films on an organic film (resin layer), which makes it impossible to form the dielectric film of good crystalline material. When a dielectric film is formed on a resin layer, whose heat resistance is not so high, the film forming process for the dielectric film is restricted to 400° C. or below. The relative dielectric constant of the dielectric film formed on a resin layer is generally about 20 and about 50 at highest. Thus, the capacitors cannot have high relative dielectric constant.